NB3N108K driver equivalent, 3.3v differential 1:8 fanout clock data driver.
* Typical Input Clock Frequency 100, 133, 166, or 400 MHz
* 220 ps Typical Rise and Fall Times
* 800 ps Typical Propagation Delay
* Dtpd 100 ps Maximum Pr.
in mind.
Inputs can directly accept differential LVPECL, LVDS, HCSL signals per Figures 7, 8, and 9. Single−ended LVPECL.
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